The reason I asked about parallel dac chips was due to reading about the DDDAC1794 project, and this note here... http://www.dddac.com/dddac1794_other.html

A nice theory that assumes jitter in each component either varies or is linearly spread among the chips.
Of course it is just HIS theory because he needs to explain something that he heard and appears to be getting a lot of 'heat' from others.

It would be nice to see actual shots of the final risetime with say 1, 10, 60 or 240 chips showing jitter, caused by DAC chips having different 'trigger points' AND slew rate improves with more (TDA1543) chips used.
It must be one hell of a clock and data driver being able to 'charge' the capacitance of so many paralleled DAC chip inputs/wiring not to mention the local decoupling and power supply which would be a real pain to get right with so many 'switches' switching at the same time
I would love to see the RFI emission that DAC shows.

Anyway... The spread that is in there will not be linear (as per his explanation drawing) but Gaussian BUT the jitter caused by the DAC chips NOT 'switching' at the same time will be improved for sure.
Too bad this jitter is much smaller than the jitter coming from the drivers that supply the clock (my assumption)

So yes... he may well perceive an improved SQ with more chips.
The question remains WHAT that would be causing.
I reckon it would be VERY EASY for such a DAC pioneer to show some real life scope pictures showing the improvements.
Now lets hope his scope also always 'triggers' at the exact same level 

Having more chips in parallel also creates other problems such as power consumption, power supply decoupling, the current needed to charge capacitances, length of wiring.
The higher the frequency goes (1794 is oversampling) the more problems you get in return.
Therfore I think it is impossible to predict how multiple 1794 DAC chips in parallel will yield a more accurate signal / affect subjectively determined SQ.
Most likely it will be an improvement to those that do.
But as with everything to get more (real) improvement you need to double the amount of chips every time you want more 1-2-4-8-16-32-64-128 etc.

On DAC linearity. I'd suppose better linearity correlates to better SQ.

I hacked up a DCX2496 (digital EQ with 6 channels) and paralleled the 3 AKM chips' output.  This seemed to increase resolution from a subjective POV.

Would be interesting to measure DAC linearity. Plot X vs. Y where X is code (let's start at 16-bit) and Y it output voltage. Might be an interesting measurement.

Just injecting a caveat here.  One of the problems with many making a subjective claim of 'better' IME is that they often just mean different (i.e. I now hear more of this but have lost that in doing so).  It's human nature to perceive new=better.  One needs to frame comments in context of how experienced is the listener, how clearly do they communicate, is there an agenda, how much are they being paid or compensated, what do they stand to gain, etc.  That way we can better parse what is valuable data from the chaff for constructive dialogue. 

Yep, that's one of the reasons our dev cycle is much longer than it used to be.

You do have to sit back, listen, test, and get perspective on new products, especially since, as designers, we're so close to them. It's thrilling when you first fire something up and have a listen...but you may be too close to the product to be impartial at that moment in time.

It's not unusual for us to intro something 18 months after first fire-up now. But there's a lot of stuff that's been on the burner...