I'm surprised John Swenson/uptone didn't actually implement a digital isolator in the regen
That's because the available USB isolators have a limited speed so you can't 'clean' anything above 24/96.
On top of that it will most likely add jitter.
From what I understand from all of this magic is that he also isn't a firm believer in ground loops being that problematic.
You can electrically isolate higher speeds but you will have to 'decode' the USB signals (in both directions) and separate the data lines and power supply.
This requires a DCDC converter or multiple and isolated windings in a power supply.
The Wyrd and uptone are 'just' USB hubs that can handle 480Mbs where also the power line is separated.
The ground is not so no isolation.
Swenson claims his USB input is better at 'loading' the USB source, he has better power supply and lower jitter clock and a 'more optimal' PCB design.
It is also smaller in formfactor.
A USB hub chip (I thought they used the same chip) doesn't ALTER the contents of the signal in ANY way.
The only thing the Wyrd and Regen are supposed to do is provide a cleaner electrical 'eyepattern' signal where the clock, which is embedded in the data signal, is lower jitter and the +5V line to the load is cleaner.
The theory is that the receiver input of the DAC recieves a signal that is 'better' in terms of accuracy and stability so the USB receiver has to 'work' less to 'clean-up' the electrical waveforms representing the clock+data.
This, in turn, should generate less 'ground plane noise' which would ultimately 'help' in creating a higher recovered clock stability and less 'disruptive groundplane noises' at the pin where the clock goes into the physical DAC chip as well as a 'cleaner' analog ground.
The analog ground and digital ground may have nice 'separated' ground planes and separated power supplies but the actual ground planes are always tied together somewhere near the DAC chip. Mostly through a ferrite bead or small inductor.
This means that lower frequency (<1MHz) still make it to the analog ground plane.
In essence these wonder boxes could actually help with DAC's that have a poor layout, poor design or use components that do not 'reject' jitter that much.
As mentioned a few times before... I would really like to see (well performed) scope shots with really high Gs/s scopes and specialised FET input probes (with an extremely low input capacitance) that can show without a shadow of a doubt that the clock signal into the DAC chip or the timing of a (yet) unfiltered ladder DAC chip will show reduced jitter at these specific points.
Would be nice if that jitter (not J-test signal) can also be analysed as well in amplitude and frequency domain.
Just to verify what most brains seem to be able to pick up that easily.
