I can see from the datasheets that something like the adum3160 in the doodlebug is relatively low speed as isolators go and maxes out at 12mbps (full speed). If my entire music catalog is less than or equal to 24/96, what is the downside of running usb through such an isolator? Why would it add jitter? The measurements I linked above, and others that I have seen posted (admittedly none made on real test equipment), seem to show that the doodlebug improves the output of the pupdac and odac at the very least. Is the issue that a 12mbps isolator is incompatible with higher frequency xmos and cmedia usb receiver chips?
When you don't have anything above 24/96 then using it is not a problem.
That is if you need the galvanic isolation or are bothered by groundloops originating from the PC.
If the latter is the case I would rather address that.
The ADuM has very small transformers (for data and clock lines) in it which provides the galvanic separation.
Some solutions use optocouplers, this one small HF transformers.
These are bandwidth limiting components (otherwise it would go higher in data rate)
That is the issue, not the other components around it. It is the limit of the IC.
On the receiving end of the transformer (so INSIDE the IC) there is electronics that has to decide (on skewed flanks of the clock) what the '1' to '0' levels are.
That decision level MAY not be as accurate/stable and so the clock thus may 'jitter' more.
Jitter is specified as 3ns max. but the spectrum and type is not measured.
The question is how much and what kind of jitter is 'added' and how susceptive the USB receiver behind it is to this 'jitter'.
Jitter in the data lines is irrelevant (as represented in different voltage levels) MUST be viewed separate from the recovered clock.
The point where the 'value' of the data is determined is not on the rising nor falling edges of the USB signal but nicely inbetween those points.
So in the middle 'horizontal' part of the eye pattern with a high margin of immunity to signal levels it is decided whether the data represented a '1' or a '0'.
The timing of this is governed by the (recovered) clock.
Any small jitter of that clock at the decision point of the data bit 'value' determination is completely irrelevant.
The recovered clock can show jitter depending on HOW synchronisation of the transmitting and receiving side of the data transfer is done.
When you de-jitter afterwards there are no downsides IMO.
My personal views on this jitter and isolation business I will keep to myself.
The RMAA reports say absolutely nothing in this case.
I see RMAA is used a lot to provide 'proof'.
It isn't any proof, perhaps only that there may be less 'nasties' introduced in the analog plane (which is looped) but that may not even be the case.
I wouldn't trust ALL RMAA measurements.
After all they are only as good as the ADC, circumstances around the PC setup and if the guy doing the tests knows the limits of RMAA.
RMAA is fun if you stay well above the limits of the soundcards and can provide some (useful) info at times by lack of better analysers around.
