Published on Aug 3, 2014
In this episode Shahriar explores the world of Delta-Sigma modulators with emphasis on a Delta-Sigma Analog to Digital Converter (ADC). The basic concepts of analog to digital conversion is presented, particularly with respect to quantization noise spectral shape and power density. Next, oversampling ADCs are presented to demonstrate the possibility of increasing SQNR (ENOB) through manipulation of quantization noise spectrum.

Due to the practical limitations of high oversampling ratios, delta-sigma modulations is explored. The principle operation behind delta-sigma ADCs is presented with detailed explanation on noise shaping, filtering and decimation. The signal and noise transfer functions for a 1st order and 2nd order delta-sigma ADC are derived. Finally, as a practical example, a 2nd order delta-sigma ADC based on a 1-bit quantizer is presented. The ADC uses two Miller integrator op-amps, one comparator and a D-Type flip-flop. The complete measurement of this delta-sigma ADC is presented. The impact of over sampling ration, op-amp linearity and input signal bandwidth is presented. The slides for this video can be downloaded from The Signal Path website.

this episode, Shahriar presents the theory, design and characterization of Nyquist Digital to Analog Converters (DACs). After a brief overview of DAC operation and theory, the schematic of an 8-Bit R-2R DAC is presented. The R-2R DAC, which is driven by a dsPIC30F6014A Microchip microcontroller is capable of producing ramps and arbitrary waveforms uploaded through an RS232 interface. The static integral non-linearity (INL) and differential non-linearity (DNL) is measured by using a Rigol DM3068 Multimeter through a Matlab interface program. The dynamic performance of the DAC is characterized using an Analog Devices AD6645 105MSps 14-Bit ADC evaluation board coupled with a USB FIFO interface board. By using the 'Visual Analog' software, the spectrum of the DAC output as well as the signal to quantization and distortion ratio (SQNDR) is calculated. Finally, the impact of component mismatches, operational amplifier non-linearity and timing uncertainty on the INL/DNL and SQNDR (ENOB) of the DAC is examined.